1. Technical Field
The present invention relates to power saving and power management of computer systems, and more particularly to an apparatus and method for controlling power management such that the computer system has minimum power consumption during the "rest mode" of the system.
2. Related Art
Personal computer systems usually adopt a power saving and power management system as provided in Advanced Power Management (APM) jointly developed by Intel (r) and Microsoft (r). The purpose of power management is to reduce power consumed in personal computers. In particular, as to portable computers powered by a battery, it maximizes available battery usage time. Basically, it automatically reduces the power consumption of parts of the computer currently not in use. The power management system provides various power saving functions with the lapse of time set by the carbon metal oxide semiconductor (CMOS) setup program, and manages the progress of power saving between full-on, doze, standby, and rest mode. The rest mode is the level of least power consumption, which interrupts power supplies directed to microprocessor, display apparatus, hard disk drives, floppy disk drives, and other subsystems. The only power supplied is that which can restore the system to the full-on state. Further, the rest mode may urge the system to enter into full power-off state, if the power management system adopts a suspend-to-disk utility. This suspend-to-disk utility saves the contents of the main memory and the system information to a reserved space on the hard disk and proceeds to the system power off. Optionally, the suspend-to-disk utility can be operated in a suspend-to-RAM mode which saves the contents of the memory and the information to the main memory itself.
As explained in more detail below, current power management systems suffer from a substantial drawback in that electrical separation of the dynamic random access memory (DRAM) from other parts of the system controller is not easily achieved by design of the system.
Therefore, there is a need for the development of a power management system which supports a power down mode while overcoming the latter and other drawbacks of current system.
The following patents are considered to be representative of the prior power management system but are burdened by the disadvantage as discussed herein:
U.S. Pat. No. 5,721,935 issued to DeSchepper et al., entitled an Apparatus and Method for Entering Low Power Mode in a Computer System; U.S. Pat. No. 5,710,931 issued to Nakamura et al., entitled a Suspension State Control for Information Processing Devices Such as Battery Powered Computers; U.S. Pat. No. 5,696,977 issued to Wells et al., entitled a Power Management System for Components Used in Battery Powered Applications; U.S. Pat. No. 5,692,202 issued to Kardach et al., entitled a System, Apparatus and Method for Managing Power in a Computer System; U.S. Pat. No. 5,682,273 issued to Hetzler, entitled a Disk Drive for Portable Computer with Adaptive Demand-driven Power Management; U.S. Pat. No. 5,680,334 issued to Silva et al., entitled a Hand-held Data Collection Computer Terminal Having Power Management Architecture Including Switchable Multipurpose Input Display Screen; U.S. Pat. No. 5,659,762 issued to Sawada et al., entitled a Method and Device for Rapidly Restarting a Computer System Expansion Device from a Power Save Mode; U.S. Pat. No. 5,630,052 issued to Shah, entitled a System Development and Debug Tools for Power Management Functions in a Computer System; U.S. Pat. No. 5,619,729 issued to Bland et al., entitled a Power Management of DMA Slaves with DMA Traps; U.S. Pat. No. 5,615,328 issued to Hadderman et al., entitled a PCMCIA SRAM Card Function Using DRAM Technology; U.S. Pat. No. 5,586,333 issued to Choi et al., entitled a Method and Control Apparatus for Generating Power Management Signal of Computer Peripheral Equipment in a Computer System; U.S. Pat. No. 5,560,023 issued to Crump et al., entitled an Automatic Backup System for Advanced Power Management, U.S. Pat. No. 5,530,879 issued to Crump et al., entitled a Computer System Having Power Management Processor for Switching Power Supply from One State to Another Responsive to a Closure of a Switch, a Detected Ring or an Expiration of a Timer; U.S. Pat. No. 5,524,249 issued to Suboh, entitled a Video Subsystem Power Management Apparatus and Method; U.S. Pat. No. 5,524,248 issued to Parks et al., entitled a Random Access Memory Power Management System; U.S. Pat. No. 5,473,572 issued to Margeson, III, entitled a Power Saving System for a Memory Controller, U.S. Pat. No. 5,410,713 issued to White et al., entitled a Power-Management System for a Computer, U.S. Pat. No. 5,410,711 issued to Stewart, entitled a Portable Computer with BIOS-Independent Power Management; U.S. Pat. No. 5,404,546 issued to Stewart, entitled a BIOS Independent Power Management for Portable Computer; U.S. Pat. No. 5,396,443 issued to Mese et al., entitled an Information Processing Apparatus Including Arrangements for Activation to and Deactivation from a Power-Saving State; and U.S. Pat. No. 5,390,350 issued to Chung et al., entitled an Integrated Circuit Chip Core Logic System Controller with Power Saving Features for a Microcomputer System.